R. SUNDARARAJAN, P. McCLUSKEY, S. AZARM, "Semi analytic model for thermal fatigue failure of die attach in power electronic building blocks", 4th High Temperature Electronics Conference, 1998, pp.99-102.
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Titre : R. SUNDARARAJAN, P. McCLUSKEY, S. AZARM, Semi analytic model for thermal fatigue failure of die attach in power electronic building blocks, 4th High Temperature Electronics Conference, 1998, pp.99-102.

Cité dans : [DATA062] Recherche sur les auteurs COFFIN et MANSON, octobre 2001.
Auteur : Sundararajan, R.
Auteur : McCluskey, P.
Auteur : Azarm, S - CALCE Electron. Production & Syst. Consortium, Maryland Univ., College Park, MD, USA

Stockage : Thierry LEQUEU
Lien : private/AZARM.pdf - 551 Ko, 9 pages
Info : A Paris law is used for crack propagation.
Vers : Bibliographie
Source : High Temperature Electronics Conference, 1998. HITEC. 1998 Fourth International
Pages : 94 - 102
Date : 14-18 June 1998
ISBN : 0-7803-4540-1
Info : IEEE Catalog Number: 98EX145, Total Pages : vii+332

Abstract :
A model has been developed to describe the shear stress distribution in the die attach layer of a
power electronic component during thermal cycling or power cycling. This stress model is the first
to account for the elastic, plastic and creep deformations present at elevated temperatures.
Shear stress is the critical failure initiator since the normal stresses are negligible at the ends
of the chip where failure is first observed. Hysteresis plots of the stress-strain relations are
presented along with an estimate of the solder joint fatigue life by the energy partitioning method,
which uses the area under the hysteresis plot as a measure of the damage accumulation in the solder.
If the energy partitioning constants of the material are not available, then the Coffin Manson criteria
can be used to assess the crack initiation. A linear elastic fracture mechanics model is used to predict
crack propagation and thus predict life of the chip by die attach fatigue.

Subject_terms :
microassembling; semi-analytic model; die attach; shear stress distribution;
power electronic building block; thermal cycling; power cycling; elastic deformation;
plastic deformation; creep deformation; elevated temperature; stress-strain relation;
energy partitioning; solder joint fatigue life; hysteresis; Coffin Manson criteria;
linear elastic fracture mechanics model; crack propagation; thermal fatigue failure

Accession_Number : 6111417

References : 16
[1] : Coffin L.F., 1954, "A Study of the Effects of Cyclic Thermal Stresses on a Ductile Metal", Transactions of ASME, vol. 76, pp. 931-950.
[2] : Dasgupta A., Oyan C, Barker D., Pecht M., 1992, "Solder Creep-Fatigue Analysis by an Energy Partitioning Approach", Transactions of ASME, vol. 114, pp. 152-160.
[3] : Deborah D. Chung, 1995, "Materials for Packaging of Electronic Packaging", Butterworth Heinemann.
[4] : Dittmer J.K., Poech M.H., Krumm M., 1995. "Failure Analysis of Aluminium Wirebonds in High Power IGBT Modules", Materials Research Society Symposium Proceedings, vol. 390, pp. 251-256.
[5] : Neid H.A., 1991, "Edge Crack Stress Intensity Factors in Layered Ceramic Metal Composites Due to Thermal Mismatch", International Conference on Failure Analysis, pp. 59-68.
[6] : Neugebauer C.A., Yerman A.F., Carlson R.O., Burgess J.F., 1986, "The Packaging of Power Semiconductor Devices", Electrocomponent Science Monographs, Gordon and Breach Science Publishers, vol. 7.
[7] : Pao Y.H, Jung W., Cooper R., Sankaran V.A., Xu X., 1995, "Thermal Fatigue Modeling of Solder Interlayer in Power Electronics", Advances in Electronic Packaging, vol. 10, pp. 1059-1068.
[8] : Pao Y.H, Govila R., 1993, "An Experimental and Finite Element Study of Thermal Fatigue Fracture of Pb-Sn Solder Joints", ASME Journal of Electronic Packaging, vol. 115, pp. l-8.
[9] : Pecht M., 1994, "Integrated Circuit, Hybrid and Multichip Module Package Design Guidelines", John Wiley and Sons, Inc.
[10] : Jaecklin A.A., 1992, "Power-Semiconductor Devices and Circuits", Asea Brown Boveri Symposia Series, Plenum Publishing Corporation.
[11] : Sarihan V., 1994, "Energy Based Methodology for Damage and Life Prediction of Solder Joints Under Thermal Cycling", IEEE Components and Manufacturing Technology, vol. 17, pp. 626-631.
[12] : Suhir E., 1981, "Die Attachment and its Influence on Thermal Stresses in the Die and the Attachment", Proceedings of IEEE Electronic Component and Technology Conferences, pp. 508-517.
[13] : van Godbold C., Sankaran V.A., Hudgins J.L., 1995, "Novel Design in Power Modules", Proceeding of IEEE Electronic Components and Technology Conference, pp 911-915
[14] : Wu W., Gao G, Dong L., 1996, "Thermal Reliability of Power Insulated Gate Bipolar Transistor (IGBT) Modules", 12th IEEE SEMI THERM Symposium, pp 136-141.
[15] : Wu W., Scacco P., Held M., Jacob P., 1995, "Electrical Overstress Failure in Power Insulated Gate Bipolar Transistors Modules", 21th International Symposium for Testing and Failure Analysis, pp 159-168.
[16] : Yamada S.E., 1992, "A Bonded Joint Analysis for Surface Mount Components", ASME Journal of Electronic Packaging, vol. 114, pp. 1-7.


Bibliographie

TOP

  [1] : [SHEET329] L.F. COFFIN, A Study of the Effects of Cyclic Thermal Stresses on a Ductile Metal, Transactions of ASME, 1954, vol. 76, pp. 931-950.
  [2] : [SHEET334] A. DASGUPTA, C. OYAN, D. BARKER, M. PECHT, Solder Creep-Fatigue Analysis by an Energy Partitioning Approach, Transactions of ASME, vol. 114, 1992, pp. 152-160.
  [3] : [LIVRE191] D.C. DEBORAH, Materials for Packaging of Electronic Packaging, Butterworth Heinemann, 1995.
  [4] : [SHEET146] K.J. DITTMER, M.H. POECH, F.W. WULFF, M. KRUMM, Failure analysis of aluminum wire bonds in high power IGBT modules, Proceedings of the Spring Meeting on MRS, San Francisco, USA, April 1995, pp. 251-256.
  [5] : [SHEET335] H.A. NEID, Edge Crack Stress Intensity Factors in Layered Ceramic Metal Composites Due to Thermal Mismatch, International Conference on Failure Analysis, pp. 59-68, 1991.
  [6] : [LIVRE193] C.A. NEUGEBAUER, A.F. YERMAN, R.O. CARLSON, J.F. BURGESS, The Packaging of Power Semiconductor Devices, Electrocomponent Science Monographs, Gordon and Breach Science Publishers, vol. 7, 1986.
  [7] : [SHEET336] Y.H. PAO, W. JUNG, R. COOPER, V.A. SANKARAN, X. XU, Thermal Fatigue Modeling of Solder Interlayer in Power Electronics, Advances in Electronic Packaging, 1995, vol. 10, pp. 1059-1068.
  [8] : [SHEET337] Y.H. PAO, R. GOVILA, An Experimental and Finite Element Study of Thermal Fatigue Fracture of Pb-Sn Solder Joints, ASME Journal of Electronic Packaging, 1993, vol. 115, pp. l-8.
  [9] : [LIVRE192] M. PECHT, Integrated Circuit, Hybrid and Multichip Module Package Design Guidelines, John Wiley and Sons, Inc, 1994.
 [10] : [SHEET330] A.A. JAECKLIN, Power-Semiconductor Devices and Circuits, Asea Brown Boveri Symposia Series, Plenum Publishing Corporation, 1992.
 [11] : [SHEET326] V. SARIHAN, Energy based methodology for damage and life prediction of solder joints under thermal cycling, IEEE Components and Manufacturing Technology, vol. 17, pp. 626-631, 1994.
 [12] : [SHEET338] E. SUHIR, Die Attachment and its Influence on Thermal Stresses in the Die and the Attachment, Proceedings of IEEE Electronic Component and Technology Conferences, Proceedings of IEEE Electronic Component and Technology Conferences, 1981, pp. 508-517.
 [13] : [SHEET341] C. Van GODBOLD, V.A. SANKARAN, J.L. HUDGINS, Novel designs in power modules, 1995
 [14] : [SHEET158] W. WU, G. GAO, L. DONG, Z. WANG, M. HELD, P. JACOB, P.SCACCO, Thermal reliability of power insulated gate bipolar transistor (IGBT) modules, 1996, Proceedings of the 12th Annual IEEE SEMI THERM Symposium, pp. 136-141.
 [15] : [SHEET339] W. WU, P. SCACCO, M. HELD, P. JACOB, Electrical Overstress Failure in Power Insulated Gate Bipolar Transistors Modules, 21th International Symposium for Testing and Failure Analysis, 1995, pp 159-162.
 [16] : [SHEET340] S.E. YAMADA, A Bonded Joint Analysis for Surface Mount Components, ASME Journal of Electronic Packaging, 1992 vol. 114, pp. 1-7.


from STN Easy - REPONSE 31 - le 06/05/2002.

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Titre : Semi analytic model for thermal fatigue failure of die attach in power electronic building blocks.

Cité dans : [DIV334]  Recherche sur les mots clés power cycling of power device, mai 2002.

Source : 1998 Fourth International High Temperature Electronics Conference. HITEC (Cat. No.98EX145) New York, NY, USA: IEEE, 1998. p.94-102 of vii+332 pp. 16 refs.
Conference : Albuquerque, NM, USA, 14-18 June 1998
Sponsor(s) : Air Force Res. Lab.; Sandia Nat. Lab.; Team Speciality Products; Cree Res.; Honeywell Solid State Electron. Center; AlliedSignal; Northrop Grumman Corp.; Electron. Devices Soc.; Components Packaging & Manuf. Technol. Soc
Price : CCCC 0 7803 4540 1/98/$10.00
ISBN : 0-7803-4540-1

Abstract :
A model has been developed to describe the shear stress distribution
in the die attach layer of a power electronic component during thermal
cycling or power cycling. This stress model is the first to account for
the elastic, plastic and creep deformations present at elevated
temperatures. Shear stress is the critical failure initiator since the
normal stresses are negligible at the ends of the chip where failure is
first observed. Hysteresis plots of the stress-strain relations are
presented along with an estimate of the solder joint fatigue life by the
energy partitioning method, which uses the area under the hysteresis plot
as a measure of the damage accumulation in the solder. If the energy
partitioning constants of the material are not available, then the Coffin
Manson criteria can be used to assess the crack initiation. A linear
elastic fracture mechanics model is used to predict crack propagation and
thus predict life of the chip by die attach fatigue.

Accession_Number : 1998:6111417 INSPEC


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