S. OUSSALAH, "Test paramétrique appliqué aux circuits intégrés de puissance ASDTM : fiabilité des diélectriques, mesure de la résistance de contact et mesure de la durée de vie", Thèse, Université de Tours, le 11 janvier 1999.
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Titre : S. OUSSALAH, Test paramétrique appliqué aux circuits intégrés de puissance ASDTM : fiabilité des diélectriques, mesure de la résistance de contact et mesure de la durée de vie, Thèse, Université de Tours, le 11 janvier 1999.

Cité dans : [DIV194]  S. FORSTER, Fiabilité des TRIACs - Rapport interne LMP, version du 11 septembre 2000.
Auteur : Slimane Oussalah

Date : le 11 janvier 2000 - UNIVERSITE FRANCOIS RABELAIS TOURS
Info : THESE POUR OBTENIR LE GRADE DE DOCTEUR DE l'UNIVERSITE DE TOURS
Discipline : Sciences de l'ingénieur
Stockage : bibliothèque LMP.

JURY :
O. BONNAUD Professeur à l'Université de Rennes, GMV Président
J.-P. CHARLES Professeur à l'Université de Metz, CLOES Rapporteur
M. JOURDAIN Professeur à l'Université de Reims, LAM Rapporteur
R. JERISIAN Professeur à l'Université de Tours, LMP Directeur de thèse
J. BAILLOU Professeur à l'Université de Tours, LMP Examinateur
J.-P. FOLLEGOT Responsable I.T. à STMicroelectronics, Tours Examinateur
J.-L. SANCHEZ Directeur de Recherche, CNRS-LAAS, Toulouse Examinateur
V. HOUDBERT Ingénieur à STMicroelectronics, Tours Invité

Info : Cette étude a été réalisée avec le concours de la Région Centre.

Résumé :
Cette étude s'inscrit dans le cadre de développement des circuits intégrés de puissance suivant le concept de l'intégration fonctionnelle ou ASDTM (Application Specific Discrete) et a pour objectif la mise en place d'un test paramétrique dans une technologie de 10 µm. Le test paramétrique doit permettre, en fin de processus de fabrication, le contrôle systématique de grandeurs électriques pertinentes caractéristiques d'une filière technologique. Il s'agit d'un test par prise de contact sous pointes, directement sur la plaquette de composants.
Notre démarche a consisté d'une part à rechercher et concevoir des motifs de test adaptés à l'extraction des paramètres physiques représentatifs de la filière technologique ASD2 (deuxième génération) et d'autre part à définir la métrologie et les procédures de test associées. Trois critères ont été retenus par l'industriel intéressé par cette étude :
- L'intégrité et la fiabilité des diélectriques d'isolation ou de grille;
- Le contrôle de la résistance de contact aluminium-silicium;
- Le contrôle de la durée de vie des porteurs minoritaires dans les jonctions bipolaires.

Abstract :
This study falls within the scope of the development of power integrated circuits, according to the concept of the functional integration or ASDTM (Application Specific Discrete), and the aim is to set a parametric test for a technology of 10 µm. The parametric test must allow, at the end of a manufacturing process, the systematic control of the electrical parameters which caracterise one process. The test consists in connecting probes to the device.
Our approach was, on one hand, to look for and design test patterns adapted to the extraction of the physical parameters representative of the ASD2 process (second generation), and on the other hand, to define the metrology and the associated test procedures.
Three criteria were chosen by the industrialists interested in this study :
- The strength and the reliability of dielectrics;
- The control of the contact aluminium-silicon resistance;
- The control of the minority carrier lifetime in the bipolar junctions.

SOMMAIRE :

INTRODUCTION 11


CHAPITRE I : DISPOSITIF EXPéRIMENTAL 17

TOP

I.1 Le test paramétrique 19
I.1.1 Définition 19
I.1.2 Système de test 20
I.1.2.1 Environnement de production 20
I.1.2.2 Environnement de Recherche et de Développement (R & D) 21
I.2 La filière ASD2 22
I.3 Conception d'un véhicule de test pour la filière ASD2 23
I.3.1 Choix des paramètres 23
I.3.1.1 Fiabilité des diélectriques 24
I.3.1.2 Résistance de contact 25
I.3.1.3 Durée de vie de recombinaison 27
I.3.2 Conception des réticules 28


CHAPITRE II : FIABILITé DES DIéLECTRIQUES éPAIS 33

TOP

II.1 Introduction 35
II.2 Dégradation et fiabilité des diélectriques 36
II.2.1 Dégradation des diélectriques 36
II.2.1.1 Injection Fowler-Nordheim 37
II.2.1.2 Injection des électrons chauds par le substrat 38
II.2.2 Charges et pièges dans l'oxyde 40
II.2.3 Statistique et notion de fiabilité 42
II.2.3.1 Loi de Weibull, claquage intrinsèque et extrinsèque 42
II.2.3.2 Taux de défaillance 47
II.2.3.3 Loi des aires 48
II.3 Modes d'injection de charges dans les diélectriques 50
II.3.1 Injection à tension constante (CVS) 51
II.3.2 Injection à courant constant (CCS) 53
II.3.3 Injection utilisant une rampe linéaire de tension (LRVS) 56
II.3.3.1 Mesures et tests 56
II.3.3.2 Modélisation de la caractéristique I-V 59
II.3.4 Injection utilisant une rampe exponentielle de courant (ERCS) 63
II.3.5 Méthodes utilisant des contraintes combinées 66
II.3.5.1 La contrainte : ERCS-CCS 66
II.3.5.2 La contrainte : LRVS-CVS 66
II.4 Fiabilité des diélectriques épais : modèle en E ou modèle en 1/E? 68
II.4.1 Fiabilité des diélectriques : modèle en 1/E 71
II.4.2 Fiabilité des diélectriques : modèle en E 83
II.5 Conclusion 97


Chapitre III : RéSISTANCE DE CONTACT 99

TOP

III.1 Introduction 102
III.2 Contact métal-semiconducteur 102
III.2.1 Théorie 103
III.2.1.1 Formation de la barrière de potentiel 103
III.2.1.2 Mécanismes de conduction dans un contact 104
III.2.2 Résistance de contact et résistance spécifique de contact 106
III.3 Techniques de mesure de la résistance de contact 109
III.3.1 Motifs de test à 2 terminaux 110
III.3.2 Motifs de test à plusieurs terminaux 114
III.4 Résultats expérimentaux 124
III.4.1 Le motif TLM 126
III.4.2 Le motif CER 134
III.4.3 Le motif CBKR 138
III.5 Conclusion 141


CHAPITRE IV : DURéE DE VIE DE RECOMBINAISON DANS LA PARTIE ACTIVE DES COMPOSANTS BIPOLAIRES 143

TOP

IV.1 Introduction 145
IV.2 Définition de la durée de vie 145
IV.2.1 Phénomènes de génération 147
IV.2.2 Phénomènes de recombinaison 148
IV.3 Les différentes techniques de mesure de la durée de vie : principes et résultats expérimentaux 149
IV.3.1 Les techniques de mesure optiques 150
IV.3.2 Les techniques de mesure électriques 151
IV.3.2.1 La technique de mesure OCVD 151
IV.3.2.2 La technique de mesure de la charge stockée 152
IV.3.2.2.1 La méthode de Kuno 154
IV.3.2.2.2 La méthode de Moll 155
IV.3.2.2.3 La méthode de Tyagi 158
IV.3.2.2.4 La méthode de Kao 159
IV.3.2.2.5 La méthode de Baliga 162
IV.3.2.3 La technique de mesure par la modulation de la conductivité 164
IV.3.2.3.1 Principe de la mesure 165
IV.3.2.3.2 Méthode admittance-fréquence 167
IV.3.2.3.3 Méthode admittance-tension 170
IV.4 Conclusion 177


CONCLUSION GéNéRALE 179

TOP


BIBLIOGRAPHIE 185

TOP


Bibliographie

TOP

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Lien : private/OUSSALAH2.pdf - 5 pages, 185 kb.
Lien : private/OUSSALAH1.pdf

  [1] : [THESE097] S. OUSSALAH, Test paramétrique appliqué aux circuits intégrés de puissance ASDTM : fiabilité des diélectriques, mesure de la résistance de contact et mesure de la durée de vie, Thèse, Université de Tours, le 11 janvier 1999.


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