J. NADERMAN, R.T.H. ROGEN, "Thermal resistance degradation of surface mounted power devices during thermal cycling", Microelectronics and Reliability, Vol. 39, No 1, January 1999, pp. 123-132.
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Info : COMPENDEX Answer Number 13, le 28/04/2000.
Info : REPONSE 28, le 31/03/2004.

Titre : J. NADERMAN, R.T.H. ROGEN, Thermal resistance degradation of surface mounted power devices during thermal cycling, Microelectronics and Reliability, Vol. 39, No 1, January 1999, pp. 123-132.

Cité dans : [DATA062] Recherche sur les auteurs COFFIN et MANSON, octobre 2001.
Cité dans : [DATA035] Recherche sur les mots clés thermal + fatigue + semiconductor et reliability + thermal + cycle, mars 2004.
Cité dans :[REVUE233] Elsevier Science, Microelectronics Reliability, Volume 39, Issue 1, Pages 1-149, January 1999.
Auteur : Naderman, J. (Philips Semiconductors, Nijmegen, Neth)
Auteur : Rongen, R.T.H

Source : Microelectronics and Reliability
Volume : 39
Numéro : 1
Date : Jan 1999
Pages : 123 - 132
CODEN : MCRLAS
ISSN : 0026-2714
Année : 1999
Document_Type : Journal
Treatment_Code : Experimental
Language : English
Stockage :

Abstract :
Backside scanning acoustic tomography (SCAT) images have been
correlated to alloy morphology (cross-section) and composition data
(stoichiometry) to model the Theta JC degradation for surface
mounted device packaged power ICs as a function of the temperature
cycling range.We find that an appropriate setting of the die attach
process can suppress needle-shaped Cu3Sn in favor of roughly
spheroid Cu6Sn5.We derived, from the degradation of the Theta JC
during thermal cycling stress tests with different temperature
swings, an acceleration factor with the use of the Coffin-Manson
law.The fit parameter q in this formula is 9.3 for the new improved
setting of the die attach process when the high SO power (HSOP)
package is used.The moisture sensitivity level has no significant
influence.Finally, a maximum Theta JC degradation of 0.33 K/W based
on the normal distribution approach results in a minimum lifetime of
12 years.When a customer requires a maximum Theta JC of 2.0 K/W at
the end of life, 50 years can be guaranteed.(Author abstract) 8
Refs.

Accession_Number : 1999(27):3571

Titre : Thermal resistance degradation of surface mounted power devices during thermal cycling.

Cité dans : [DATA035] Recherche sur les mots clés thermal + fatigue + semiconductor et reliability + thermal + cycle, mars 2004.
Auteur : Naderman, J. (Philips Semiconductors, Nijmegen, Neth)
Auteur : Rongen, R.T.H.

Source : Microelectronics and Reliability 39 1 Jan 1999.p 123-132
CODEN : MCRLAS
ISSN : 0026-2714
Année : 1999
Document_Type : Journal
Treatment_Code : Experimental
Language : English
Stockage :
Switches :
Power :
Software :

Abstract :
Backside scanning acoustic tomography (SCAT) images have been correlated to alloy morphology (cross-section) and composition data (stoichiometry) to model the Theta JC degradation for surface mounted device packaged power ICs as a function of the temperature cycling range.We find that an appropriate setting of the die attach process can suppress needle-shaped Cu3Sn in favor of roughly spheroid Cu6Sn5.We derived, from the degradation of the Theta JC during thermal cycling stress tests with different temperature swings, an acceleration factor with the use of the Coffin-Manson law.The fit parameter q in this formula is 9.3 for the new improved setting of the die attach process when the high SO power (HSOP) package is used.The moisture sensitivity level has no significant influence.Finally, a maximum Theta JC degradation of 0.33 K/W based on the normal distribution approach results in a minimum lifetime of 12 years.When a customer requires a maximum Theta JC of 2.0 K/W at the end of life, 50 years can be guaranteed.(Author abstract) 8 Refs.

Accession_Number : 1999(27):3571 COMPENDEX


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