T. ALANDER, S. NURMI, P. HEINO, E. RISTOLAINEN, "Impact of component placement in solder joint reliability", Microelectronics Reliability, Volume 42, Issue 3, March 2002, pp. 399-406.
Copyright - [Précédente] [Première page] [Suivante] - Home

Article : [ART229]

Titre : T. ALANDER, S. NURMI, P. HEINO, E. RISTOLAINEN, Impact of component placement in solder joint reliability, Microelectronics Reliability, Volume 42, Issue 3, March 2002, pp. 399-406.

Cité dans :[REVUE295] Elsevier Science, Microelectronics Reliability, Volume 42, Issue 3, Pages 307-461, March 2002.
Auteur : T. Alander
Auteur : S. Nurmi
Auteur : P. Heino
Auteur : E. Ristolainen

Vers : Bibliographie
Adresse : Institute of Electronics, Tampere University of Technology, P.O. Box 692, 33101 Tampere, Finland
Fax : +358-3-365-2620
Lien : mailto:tapani.alander@tut.fi
Source : Microelectronics Reliability
Volume : 42
Issue : 3
Date : March 2002
Pages : 399 - 406
DOI : 10.1016/S0026-2714(01)00217-7
PII : S0026-2714(01)00217-7
Lien : private/ALANDER1.pdf - 270 Ko, 8 pages
Switches : IGBT
Stockage : Thierry LEQUEU

Abstract :
Component placement in an electronic product is usually derived using
manufacturability or electromagnetic effects as the defining factors. The effect
of placement on component reliability is rarely studied. High integration level
of modern products provides advantages in high speed electronics but can
severely degrade the reliability of components, unless certain design rules are met.
In this paper the relation between placement and the solder joint reliability of
a BGA components is studied with computational methods in 3-D and verified with
experimental tests. Finite element method is utilized to calculate the
accumulation of plastic work in solder joints. Based on the failure criteria
obtained in the process, simple design rules are extracted and presented.

Article Outline
1. Introduction
2. Model
3. Results and discussion
3.1. Components in the same place, different sides
3.2. Components placed edge to edge
3.3. Components placed corner to corner
3.4. Components placed edge to corner
3.5. Component array
4. Conclusions



References : 14
[1] : Dean D. Thermal design of electronic circuit boards and packages. Electrochemical Publications Ltd, 1985.
[2] : J.H. Lau, Editor, Ball grid array technologies, McGraw-Hill, New York (1995).
[3] : J.H. Lau and Y. Pao Solder joint reliability of BGA, CSP, flip chip, and fine pitch SMT assemblies, McGraw-Hill, New York (1997).
[4] : T. Alander, P. Heino and E. Ristolainen , Solder bump reliability issues on bump layout. IEEE Trans Adv Packaging 23 4 (2000), pp. 715-720.
[5] : J.H. Lau , The roles of DNP (distance to neutral point) on solder joint reliability of area array assemblies. Solder Surf Mount Technol 26 (1997), pp. 58-60.
[6] : V. Gektin, A. Bar-Cohen and S. Witzman , Coffin-Manson based fatigue analysis of underfilled DCAs. IEEE Trans Comp Packaging Manufact Technol Part A 21 4 (1998), pp. 577-584.
[7] : B.Z. Hong , Finite element modeling of thermal fatigue and damage of solder joints in a ceramic ball grid array package. J Electron Mater 26 7 (1997), pp. 814-820.
[8] : Su B, Hareb S, Lee Y, Lii M-J, Thurston M. Solder joint reliability modeling for a 540-i/o plastic ball-grid-array assembly. Proceeding of the 1998 International Conference on Multichip Modules and High Density Packaging, 1998. p. 422-8.
[9] : Darveaux R. Solder joint fatigue life model. In: Mahidhara R et al., editors. Design and reliability of solders and solder interconnections. The Minerals, Metals and Materials Society; 1997. p. 213-8.
[10] : S. Brown, K. Kim and L. Anand , An internal variable constitutive model for hot working of metals. Int J Plast 5 (1989), pp. 95-130.
[11] : T. Anderson, I. Guven, E. Madenci and G. Gustafsson , The necessity of reexamining previous life prediction analyses of solder joints in electronic packages. IEEE Trans Comp Packaging Technol 23 3 (2000), pp. 516-520.
[12] : Feustel F, Wiese S, Meusel E. Time-dependent material modeling for finite element analyses of flip chips. Proceedings of the 50th Electronic Components and Technology Conference, 2000. p. 1548-53.
[13] : Darveaux R. Effect of simulation methodology on solder joint crack growth studies. Proceedings of the 50th Electronic Components and Technology Conference, 2000. p. 1048-58.
[14] : J. Nysæther, P. Lundström and J. Liu , Measurement of solder bump lifetime as a function of underfill material properties. IEEE Trans Comp Packaging Manufac Technol Part A 21 2 (1998), pp. 281-287.

Mise à jour le mardi 23 août 2016 à 19 h 43 - E-mail : thierry.lequeu@gmail.com
Cette page a été produite par le programme TXT2HTM.EXE, version 10.7.2 du 22 mars 2015.

Copyright 2016 : TOP
Les informations contenues dans cette page sont à usage strict de Thierry LEQUEU et ne doivent être utilisées ou copiées par un tiers.
Powered by www.google.fr, www.e-kart.fr, La société Kart Masters, La Boutique Kart Masters Shop and www.lequeu.fr.