WEDNESDAY, October 14, 8:30 a.m. - 10:10 a.m
Session #2 Wafer Level Reliability (WLR)
Gordon Claudius, Rockwell & Doug Menke, Motorola, Co-chairs

WLR-1

"Practical Triggering of Early Breakdown in Thin Oxides," J.C. Jackson and D.J. Dumin of Clemson University; Clemson, SC and Cleston Messick of Fairchild Semiconductor, West Jordan, UT

WLR-2

"Complete method for Ebd Correction by Series Resistance Characterization," David K. Monroe and Scot E. Swanson of Sandia National Laboratories, Albuquerque, NM

WLR-3

"A Constant Gate Current Technique for Obtaining Low-Frequency C-V Characteristics of MOS Capacitors," Jack G. Qian and Roy A. Hensley of Dallas Semiconductor Inc., Dallas, TX and Eric Littlefield of Hewlett-Packard Co., Englewood, CO

WLR-4

"The Life Time Model using the Correlation between Dielectric Thickness, and Voltage Stress for 64MB Accelerated Reliability Testing," Yumi Kwon, Namhyun Cha, Samjin Whang, Namsung Cho, Whajoon Lee of Samsung Electronics Co. Itd; Yongin-City, Kyungki-Do, Korea