J.A. ANDREWS, "Package thermal resistance model: Dependency on equipment design", IEEE Transactions on Components, Hybrids and Manufacturing Technology, Vol. 11, No. 4, 1988, pp. 528-537.
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Titre : J.A. ANDREWS, Package thermal resistance model: Dependency on equipment design, IEEE Transactions on Components, Hybrids and Manufacturing Technology, Vol. 11, No. 4, 1988, pp. 528-537.

Cité dans : [DIV442]  Recherche sur les mots clés THERMAL RESISTANCE, juillet 2004.
Auteur : Andrews, James A. (Motorola SPS Inc, Phoenix, AZ, USA)

Meeting : 4th Annual IEEE Semiconductor Thermal and Temperature Measurement Symposium.

Info : organization : IEEE, Components, Hybrids & Manufacturing Soc, New York, NY, USA
Location : Los Angeles, CA, USA and San Diego, CA, USA
Date : 10 Feb 1988-12 Feb 1988

Source : IEEE Transactions on Components, Hybrids and Manufacturing Technology
Volume : 11
Numéro : 4
Pages : 528 - 537
ISSN : 0148-6411
Année : 1988
Meeting_Number : 12263
Document_Type : Journal
Treatment_Code : Experimental; Theoretical
Language : English
Stockage : Thierry LEQUEU
Lien : Andrews1.pdf - 826 Ko, 10 pages.
Vers : Bibliographie

Abstract :
A physical model is used to explain how package thermal resistance can increase by a factor of four even though cooling conditions remain constant.The model accounts for the discrepancy between observed system thermal performance of a package and data sheet thermal resistance values which are not accompanied by qualifying data consisting of chip thermal resistance, board temperature rise over ambient, convection coefficient, mounting sensitivity, and power dissipation.In all, eight constants are needed to predict inherent increases in package thermal resistance when going from a lab condition to an equipment condition.These constants and procedures for obtaining them are given for dual in line (DIP), pin grid array (PGA), small outline transistor (SOT), and plastic leaded chip carrier (PLCC) packages.A foundation is established for routinely including the constants in component data sheets and for strengthening thermal measurement standards.

Accession_Number : 1989(8):81945 COMPENDEX



Références : 14 Refs.
[1] : W. Aung, Ed. Cooling Technology for Electronic Equipment. New York, NY: Hemisphere Pub. Corp., 1988. sec. 2, article 12, pp. 249-264.
[2] : K. E. Manchester and D. W. Bird, "Thermal resistance: A reliability consideration," IEEE Trans. Comp.. Hybrids Manuf. Technol., vol. CHMT-3, no. 4. pp. 580-587, Dec. 1980.
[3] : R. J. Hannemann, "Micro electric device thermal resistance: A format for standardization," in Thermal Management Concepts in Microelectronic Packaging from Component to System. ISHM Tech. Monog., Scr. 6984-003, p. 295, 1984.
[4] : G. K. Baxter, "A recommendation of thermal measurement techniques for IC chips and packages," in Proc. IEEE lm. Reliability Physics Symp., pp. 204-21 J, 1977.
[5) : J. A. Andrews, L. M. Mahalingham, and H. M. Berg, "Thermal characteristics of 16 and 40 pin plastic DIP's," IEEE Trans. Camp,. Hybrids. Manuf. Technol., vol. CHMT-4. no. 4, pp. 455-461, Dec. 1981.
[6] : A. Sharma, "Statistical thermal modeling of multi-chip modules," in Proc, 36th Electronics Components Conf., pp. 138-142, May 1986.
[7] : C. J. Keller and V. W. Antonetti, "Statistical thermal design for computer electronics," Electron. Packag. Prod" vol. 19, no. 3, pp. 55-62, Mar. 1979.
[8] : V. W. Antonetti and R. E. Simons, "Bibliography of beat transfer in electronic equipment," IEEE Trans, Camp.. Hybrids, Manuf. Technol., vol. CHMT-8, no. 2, p. 289, June 1985.
[9] : F. Zirilli and R. A. Wirtz, "A calculation of convection in the entrance of parallel plate channels with variable wan heat flux," in Proc. 2nd IEPS Conf. (Nov. 15-17, 1982), p. 346.
[10] : R. Moffat, D. Arvizu, and A. Onega, "Cooling e1ectronie components: forced convection experiments with an air-cooled array," ASME Proc. Heal Transfer in Electron. Equip.. pp. 17-27, 1984.
[11] : L. M. Mahalingham, J. A. Andrews. and J. E. Drye. "Thermal studies on pin array packages for LSI and VLSI 1ogic circuits," Semiconductor Int., pp. 77-96, Aug. 1983.
[12] : Mahalingham et al., "Thermal effects of die bond voids in metal, ceramic, and plastic packages," presented at the IEEE 34th Electron ics Components Conf., 1984.
[13] : M. Alli, M. Mahalingham, and J. A. Andrews, "Thermal characteristics of small outline transistor (SOT) packages," IEEE Trans. Comp., Hybrids, Manuf. Technol., vol. CHMT-9, no. 4, pp. 353-363, Dec. 1986.
[14] : A. Bar-Cohen, "Thermal management of air- and liquid-cooled multichip modules," IEEE Trans. Comp., Hybrids. Manuf. Technol., vol. CHMT-IO, no. 2, pp. 159-175, June 1987.

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